Decreasing device size and increasing device density has traditionally been a high priority for the manufacturing of the integrated circuits. Optical lithography has been a driving force for device scaling. Conventional optical lithography is limited to about 80 nm pitch for single exposure patterning. While double and other multi-patterning processes can realize smaller pitch, these approaches are expensive and more complex.
Directed self-assembly (DSA), a technique that aligns self-assembling polymeric materials on a lithographically defined directing or guide pattern, is a potential option for extending current lithography beyond its pitch and resolution limits. The self-assembling materials, for example, are block copolymers (BCPs) that consist of a “A” homopolymer covalently attached to a “B” homopolymer, which are deposited over a lithographically defined directing pattern on a semiconductor substrate. The lithographically defined directing pattern is a pre-pattern (hereinafter “DSA directing pattern”) that is encoded with spatial chemical and/or topographical information (e.g., chemical epitaxy and/or graphoepitaxy) and serves to direct the self-assembly process and the pattern formed by the self-assembling materials. Subsequently, by annealing the DSA polymers, the A polymer chains and the B polymer chains undergo phase separation to form an A polymer region and a B polymer region that are registered to the underlying DSA directing pattern to define a nanopattern (hereinafter “DSA pattern”). Then, by removing either the A polymer block or the B polymer block by wet chemical or plasma-etch techniques, a mask is formed for transferring the DSA pattern to the underlying semiconductor substrate.
Generating a photomask for lithographically defining the DSA directing pattern to accurately form the shape of the DSA pattern requires proper accounting of a multitude of physical effects that occur during the DSA process including from photomask writing on through to etching of the phase separated self-assembly materials to form the DSA pattern. For instance, a typical DSA process involves fabrication of a patterned photomask to be used to make the DSA directing pattern, exposing this photomask in a lithographic tool to photoresist that is disposed on a semiconductor substrate, developing and etching the exposed semiconductor substrate, processing the semiconductor substrate to create the DSA directing pattern, spin coating the pre-patterned semiconductor substrate with BCP, and annealing and etching the BCP to form the DSA pattern. Unfortunately, current approaches for generating a photomask for lithographically defining a DSA directing pattern to form a DSA pattern either do not fully account for the physical effects that occur during the DSA process, or if the approach does account for these physical effects, it uses numerical techniques that generally involve rigorous DSA simulations that consume significant computational time and can make DSA correction infeasible for even a medium size integrated circuit layout.
Accordingly, it is desirable to provide methods for fabricating integrated circuits including generating a photomask for lithographically defining a DSA directing pattern to accurately form a DSA pattern. Moreover, it is desirable to provide methods for fabricating integrated circuits including generating a photomask for lithographically defining a DSA directing pattern that more fully account for the physical effects that occur during a DSA process and that are practical for making DSA correction for various size integrated circuit layouts. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and this background.